Apollo 11 Guidance Computer (AGC) vs USB-C Chargers

I think it is healthy to compare historical and modern computing. Let's see how the CPUs contained in recent USB-C wall chargers compare to the power of the Apollo 11 Guidance Computer (AGC). The Apollo 11 spacecraft carried 3 humans to the moon and back in 1969.

Device	Google Pixel 18W Charger	Huawei 40W SuperCharge	Anker PowerPort Atom PD 2	Apollo 11 Moon Landing Guidance Computer (AGC)
Function	Charges a phone	Charges a phone or maybe a laptop	Charges 2 phones or maybe laptops	Fly most-of-the-way to moon (CSM) Land on moon (LEM) Take off from moon (LEM) Fly back to Earth (CSM)
Microchip(s)	Weltrend WT6630P	Richtek RT7205	Cypress CYPD4225	Discrete components
Clock Speed	10 MHz	22.7 MHz	48 MHz	1.024 MHz
RAM	512 bytes	"0.75kB"	8KB	2048 15-bit words / 4KB if you include the parity bit in each word
Program Storage Space	8KB	24KB (Mask ROM + OTP)	128KB Flash	36,864 15-bit words / 72KB if you include the parity bit in each word
Instruction Set	Intel 8051 (8-bit)	Unknown	ARM Cortex-M0 32-bit implementing ARMv6-M	16-bit accumulator based
Sources	ChargerLabs Teardown WT6630P Datasheet	ChargerLabs Teardown RT2705 Datasheet	ChargerLabs Teardown CYPD4225 Datasheet	CPU description Memory Functional overview

Interpretation

The most powerful CPU in the table is from the Anker PowerPort Atom PD 2 (CYPD4225). Compared with the Apollo 11 Guidance Computer it runs at ~48 times the clock speed with 1.8x the program space. It's very tempting to claim that the Anker PowerPort Atom PD 2 could fly me to the moon. But we need more analysis. What if the Apollo 11 Guidance Computer contains dedicated hardware which missing in the CYPD4225 and cannot be replicated in software? Let's compare the CYPD4225 to the Apollo 11 Guidance Computer. I'll be using the excellent Virtual AGC documentation as a reference.

Speed

The Apollo 11 Guidance Computer has a master clock frequency of 1.024MHz. Instructions need at least 12 clock cycles (11.72uS). It operates using one's complement integer arithmetic. There is no floating point. There is a single accumulator register to perform arithmetic.

The Anker PowerPort Atom PD 2 uses a CYPD4225, containing an ARM Cortex-M0 CPU. Luckily for this analysis both the Apollo 11 Guidance Computer and the Cortex-M0 CPUs are very predictable compared to more sophisticated modern CPUs. They have no cache and memory access happens at a constant speed. Instructions execute in-order. They have no hardware floating point. They have no vector/matrix hardware (like AVX, SSE, or NEON). Therefore we can learn a lot by just comparing the cycles of roughly equivalent instructions.

Instruction	Apollo 11 Guidance Computer Cycles	ARM Cortex-M0 Cycles
15-bit Addition and Subtraction	24 (2 * 12)	1
31 Bit Addition and Subtraction	36 (3 * 12)	1
Multiply	36 (3 * 12)	1 - see datasheet
Divide	72 (6 * 12)	Not Available
Branch if zero	24 (2 * 12)	1-4 without CMP, 2-5 with CMP
CCS (Count Compare Skip) / CMP	24 (2 * 12)	1
Store accumulator/register to memory (XHC / STR)	24 (2 * 12)	2
Load memory to accumulator/register (XHC / LD)	24 (2 * 12)	2

From the table we see that instructions are usually a proportionate number of low clock cycles. Most of the Apollo 11 Guidance Computer instructions take 12 times the clock cycles of the Cortex-M0. Given that the Cortex-M0 runs at 46.9x the clock speed and that they are otherwise comparable (no cache, no SIMD) I claim, for most applications:

The Anker PowerPort Atom PD 2 USB-C Wall Charger CPU is 563 times faster than the Apollo 11 Guidance Computer.

563 = (12 Cortex-M0 instructions per 1 Apollo 11 Guidance Computer instruction) * (48 MHz Cortex-M0) / (1.024 MHz Apollo 11 Guidance Computer).

After skimming though the Apollo 11 Guidance Computer instruction set, the only important missing Cortex-M0 instruction seems to be division. But each division on the Apollo 11 Guidance Computer takes 72 cycles * (1/1.024MHz) = 70.3 uS. In 70.3uS the CYPD4225 can execute 70.3uS * 48 MHz = 3374 arithmetic instructions. Branches are not too expensive (3 cycles). Hopefully that is enough to implement software division.

Memory

Program Storage Space

This is worth looking at. The Apollo programmers wrote a virtual machine/interpreter for the Guidance Computer because they were struggling with program space. It mattered enough to them to trade speed for increased storage.

The Apollo 11 Guidance Computer stores 36,864 15-bit words. The CYPD4225 stores 128KB in flash. It's easy to calculate that the CYPD4225 can store 1.90 times more information than a Apollo 11 Guidance Computer.

But does one computer have an advantage in instruction encoding? The Apollo 11 Guidance Computer instructions are 15-bit fixed width instructions. The Cortex-M0 implements the THUMB2 instruction set which has 16-bit instructions and 32-bit instructions. The 16-bit instructions cover most common operations, such as arithmetic, branching, load/store. So it seems most programs can be encoded in mostly 16-bit instructions. How many instructions can a CYPD4225 store? 128KB / 16-bits = 65,536 instructions. The Apollo 11 Guidance computer can store 36,864 instructions. Naively, the Anker PowerPort Atom PD2 can store at most 1.78x more instructions than the Apollo 11 Guidance Computer.

Perhaps not all instructions used will be 16-bit. Let's go a bit extreme and say half the instructions will be 32-bit and half the instructions will be 16-bit. Using the following equations where x=16-bit instructions and y=32-bit instructions:

2x + 4y = 128*1024, x = y

We get 21,845 32-bit and 16-bit instructions which is 43,690 instructions total -- 1.19x more than the Apollo 11 Guidance Computer.

The THUMB2 instruction set used by the Cortex-M0 is designed to be compact. The Cortex-M0 has 12 general purpose registers which can hold arithmetic results compared the single accumulator on the Apollo 11 Guidance Computer. The Apollo 11 Guidance Computer has the advantage that it can do arithmetic and store the result directly to a memory location while the Cortex-M0 requires a separate store instruction. The Cortex-M0 has the advantage that the memory is simpler and requires no bank switching. But the bank switching means that more memory addresses can be encoded directly into arithmetic instructions. This is not straightforward to compare. However, given that the CYPD4225 can hold 1.19x - 1.78x the instructions, I claim that the CYPD4225 should be able to hold an equivalent Apollo 11 Guidance Computer program.

Notice that other USB-C chargers have less program capacity than the Apollo 11 Guidance Computer. Going to the moon on 8KB sounds hard. The Apollo 11 Guidance Computer was originally designed with less program storage space but it had to be increased - conditions were not cozy. Therefore, I will not consider other USB-C charger CPUs as candidates for taking me to the moon.

Random Access Memory

The Apollo 11 Guidance Computer can store 2,048 15-bit words. The CYPD4225 has 8KB of RAM. The Anker PowerPort Atom PD2 has a little over twice the RAM of the Apollo 11 Guidance Computer. One caveat is that the Apollo 11 Guidance Computer mostly computes in terms of 15-bit words. The equivalent Cortex-M0 computations are done in 16-bit words. So in terms of equivalent computational units the CYPD4225 has 4,096 16-bit words vs the Apollo 11 Guidance Computer's 2,048 15-bit words. So exactly twice the words.

To The Moon and Back

Wikipedia claims the Apollo 11 spacecraft contains 4 computers:

2x Apollo 11 Guidance Computers (examined above). One in the LEM and one in the CSM.
1x Saturn Launch Vehicle Digital Computer (LVDC)
1x Abort Guidance System (AGS)

Property	Apollo 11 Guidance Computer (AGC)	LVDC (Manual)	AGS (Design Review)
Clock Speed	1.024MHz	2.048MHz	1.024MHz (Search for MHz)
RAM	2048 15-bit words	4,096 13-bit words	2,048 18-bit words
Program Storage	36,864 15-bit words	32,768 13-bit words	2,048 18-bit words
ADD Instruction Duration	23.4uS	82.0uS	10uS (Search for "Speed -")
MULTIPLY Instruction Duration	35uS	420uS? "MPH requires five computer cycles"	70uS

Is there a possibility that we can replace multiple computers with a single CYPD4225? I don't think so because the 4 computers were in separate parts of the spacecraft. So we will assume that we need 4 computers to fly an Apollo 11 without significantly altering the design.

All the computers on Apollo 11 are less powerful and have less memory than an Anker PowerPort Atom PD 2. I'm going to assume that the LVDC and the AGS do not use any exciting instructions that would be difficult for a Cortex-M0 to perform - besides division. I will hand-wave this away by saying that division probably takes longer than multiplication. And I have listed the multiplication times above. The CYPD4225 can comfortably execute thousands of arithmetic instructions in the time it takes any Apollo 11 computer to execute a single multiply.

I claim that we would only need the compute power of 4 Anker PowerPort Atom PD 2 USB-C chargers to get to the moon with the following caveats:

The CYPD4225 is definitely not rated for space. I have no idea if it would work in space.
I did not examine the peripherals used by the Apollo 11 computers. The CYPD4225 has 30 GPIO signals and talks UART, I2C, and SPI. However, how many peripherals did the Apollo 11 Guidance Computer support? 100? 10? More Googling is needed. And probably the voltage levels from the 1960s are too high to connect to a CYPD4225.
Ron Burkey, Owen Smith, and others point out that the LVDC actually contains triply-redundant logic. The logic gives 3 answers and the voting mechanism picks the winner. So it may be fair to claim that you in fact need 3 USB-C chargers to compare against the LVDC. However, I think the redundancy was for reliability and I completely ignoring reliability. And in fact I think any attempt to emulate this voting scheme with 3x microcontrollers with a 4th to tally votes will not make the system any more reliable. But this is proving controversial and it may soon get its own full paragraph summarizing different viewpoints!

What does it mean?

I was responsible for the overall firmware for Structure Sensor. It used USB charger detection present on most USB chargers at that time - some resistor network between the USB D+ / D- signals. There was no digital communication. The firmware portion was implemented by Evan Fletcher and I think he reported it was easy to do. That was 2012-2013. Now in 2020 USB-C is here. Many USB chargers have a microcontroller with a CPU. Some are less capable than the Apollo 11 Guidance Computer. Some are more capable than the Apollo 11 Guidance Computer. Most of them with at least ~10x faster clock speed. USB-C Power Delivery solves problems and gives us new capabilities. But it is another step toward increasing complexity. It is another firmware and chip to handle during manufacturing. I don't have an alternate proposal for power delivery that:

Uses 1 wire in the cable
Lets USB-C chargers present arbitrary charge current and voltages

Last updated 2024-01-06. Did I miss something obvious? Is the Anker PowerPort Atom PD 2 not going to cut it? forrest@forrestheller.com
Thanks my father for looking at this. And thanks to Ron Burkey who looked at a small piece of info I emailed and provided more context. Thanks to Sean Barrett for the correction that Cortex-M0s are pipelined.